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Development of oxide semiconductors : materials, devices, and integration

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dc.contributor Wager, John F
dc.contributor Jander, Albrecht
dc.contributor Keszler, Douglas
dc.contributor Plant, Tom
dc.contributor Tate, Janet
dc.date 2007-08-16T22:32:39Z
dc.date 2007-08-16T22:32:39Z
dc.date 2007-08-07
dc.date 2007-08-16T22:32:39Z
dc.date.accessioned 2013-10-16T08:08:18Z
dc.date.available 2013-10-16T08:08:18Z
dc.date.issued 2013-10-16
dc.identifier http://hdl.handle.net/1957/6347
dc.identifier.uri http://koha.mediu.edu.my:8181/xmlui/handle/1957/6347
dc.description Graduation date: 2008
dc.description The aim of this dissertation is to develop oxide semiconductors by radio-frequency sputtering for thin-film transistor (TFT) applications. A variety of oxide semiconductors are used as the TFT channel layer, including indium gallium oxide (IGO), zinc tin oxide (ZTO), and indium gallium zinc oxide (IGZO). The variety of materials used underscores the abundance of materials options available within this nascent technology, with each material exhibiting unique chemical, mechanical, and electrical properties. The influence of several deposition parameters is explored; oxygen partial pressure of the deposition ambient is found to have a profound effect on the electrical characteristics of each material. With optimized deposition conditions, TFTs based on these materials exhibit excellent electrical properties, even when annealed at low-temperature (175 °C). Specifically, ZTO-based TFTs which are subjected to a 175 °C post-deposition anneal exhibit a channel mobility near 9 cm²V⁻¹s⁻¹. However, advancement of this technology also requires research in integration-related issues. Therefore, the effect of channel layer passivation and of TFT stability is evaluated. Passivation of the oxide semiconductor surface is required for circuits which employ multiple levels of interconnect and for mechanical/chemical protection of devices. Here, successful passivation of IGO, ZTO, and IGZO-based TFTs is demonstrated using SU-8, a negative tone epoxy-based photoresist. To appraise TFT stability, a constant voltage bias stress test of 1000 minutes is utilized, where the drain current, ID, is monitored throughout the duration of testing and the turn-on voltage, Von, is evaluated before and after stressing. TFT stability is found to be correlated to the turn-on voltage of a device and to the thickness of the semiconductor layer. IGZO-based TFTs with excellent stability are demonstrated, exhibiting almost no decrease in ID or any shift in Von throughout the duration of bias stress testing.
dc.language en_US
dc.subject semiconductors
dc.subject TFTs
dc.subject Electrical engineering
dc.title Development of oxide semiconductors : materials, devices, and integration
dc.type Thesis


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