أعرض تسجيلة المادة بشكل مبسط

dc.contributor Traylor, Roger
dc.contributor Bose, Bella
dc.contributor von Jouanne, Annette
dc.contributor Warnes, William
dc.date 2006-09-13T16:24:09Z
dc.date 2006-09-13T16:24:09Z
dc.date 2006-08-25
dc.date 2006-09-13T16:24:09Z
dc.date.accessioned 2013-10-16T07:40:11Z
dc.date.available 2013-10-16T07:40:11Z
dc.date.issued 2013-10-16
dc.identifier http://hdl.handle.net/1957/3048
dc.identifier.uri http://koha.mediu.edu.my:8181/xmlui/handle/1957/3048
dc.description Graduation date: 2007
dc.description As the Tekbots program expands into senior and graduate level classes at Oregon State University, so does the need arise for more complex learning platforms. These complex hardware platforms cannot be adequately tested in a manufacturing environment as we have done previously. Also, due to their complexity, these platforms require substantial collateral documentation to allow first-time users to quickly become productive learners. This thesis details the development of a post-manufacturing test suite, known as OMICRON, to comprehensively test an FPGA learning platform. It also documents the development of a user guide for the board that explains user accessible features as well as providing the necessary startup information so students can quickly become acquainted with the new learning platform. While developing OMICRON, a new feature surfaced that provides a cycle-accurate hardware testbench debugger for testing student component modules that are implemented within the FPGA. This functionality serves a practical as well as an educational use by enabling test generation for detecting logic errors at a hardware level. Students can probe their own designs from an intuitive low-level command line interface once the designs have been loaded into the FPGA. The debugger can also be used to probe external circuits connected to the FPGA. In addition to simple probes, the hardware debugger is able to output testbench bit vectors in a continuous flow, and simultaneously receive cycle-accurate vector results. These test vectors can either be manually constructed, or extracted from simulation software. This thesis shall also demonstrate this unique test flow.
dc.language en_US
dc.subject TekBot
dc.subject learning platform
dc.subject hardware testbench
dc.subject FPGA testing
dc.title Development test suite for FPGA TekBot learning platform
dc.type Thesis


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أعرض تسجيلة المادة بشكل مبسط