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Ground tap placement and sizing to minimize substrate noise coupling in RF LNAs

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dc.contributor Mayaram, Kartikeya
dc.contributor Fiez, Terri
dc.contributor Settaluri, Raghu
dc.contributor Ostroverkhova, Oksana
dc.date 2006-08-21T19:57:39Z
dc.date 2006-08-21T19:57:39Z
dc.date 2006-05-30
dc.date 2006-08-21T19:57:39Z
dc.date.accessioned 2013-10-16T07:39:39Z
dc.date.available 2013-10-16T07:39:39Z
dc.date.issued 2013-10-16
dc.identifier http://hdl.handle.net/1957/2937
dc.identifier.uri http://koha.mediu.edu.my:8181/xmlui/handle/1957/2937
dc.description Graduation date: 2007
dc.description The substrate noise injected by a stepped buffer circuit into two single-ended 1.5GHz low noise amplifiers is examined for a heavily doped 0.25µm CMOS process. The difference in the LNA noise rejection is characterized as a function of the size and placement of substrate contacts. The use of a resistive model for the substrate, and SPICE models for the interconnect and passive device parasitics give good correlation between the measured and simulated results. A reduction of 2-12dB is achieved for the intermodulation products, with larger substrate contacts. It is shown that large ground taps placed in close proximity to the input transistor are most effective in suppressing the IM levels.A detailed examination of the noise injection mechanisms in a stepped buffer shows that the injected noise is a strong function of the layout of the buffer interconnects. Proposed methods to reduce the injected noise result in improvements of 9-11dB.
dc.language en_US
dc.title Ground tap placement and sizing to minimize substrate noise coupling in RF LNAs
dc.type Thesis


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