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Memory Hierarchy Hardware-Software Co-design in Embedded Systems

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dc.creator Ge, Zhiguo
dc.creator Lim, H. B.
dc.creator Wong, Weng Fai
dc.date 2004-12-13T07:39:07Z
dc.date 2004-12-13T07:39:07Z
dc.date 2005-01
dc.date.accessioned 2013-10-09T02:49:29Z
dc.date.available 2013-10-09T02:49:29Z
dc.date.issued 2013-10-09
dc.identifier http://hdl.handle.net/1721.1/7427
dc.identifier.uri http://koha.mediu.edu.my:8181/xmlui/handle/1721
dc.description The memory hierarchy is the main bottleneck in modern computer systems as the gap between the speed of the processor and the memory continues to grow larger. The situation in embedded systems is even worse. The memory hierarchy consumes a large amount of chip area and energy, which are precious resources in embedded systems. Moreover, embedded systems have multiple design objectives such as performance, energy consumption, and area, etc. Customizing the memory hierarchy for specific applications is a very important way to take full advantage of limited resources to maximize the performance. However, the traditional custom memory hierarchy design methodologies are phase-ordered. They separate the application optimization from the memory hierarchy architecture design, which tend to result in local-optimal solutions. In traditional Hardware-Software co-design methodologies, much of the work has focused on utilizing reconfigurable logic to partition the computation. However, utilizing reconfigurable logic to perform the memory hierarchy design is seldom addressed. In this paper, we propose a new framework for designing memory hierarchy for embedded systems. The framework will take advantage of the flexible reconfigurable logic to customize the memory hierarchy for specific applications. It combines the application optimization and memory hierarchy design together to obtain a global-optimal solution. Using the framework, we performed a case study to design a new software-controlled instruction memory that showed promising potential.
dc.description Singapore-MIT Alliance (SMA)
dc.format 113322 bytes
dc.format application/pdf
dc.language en
dc.relation Computer Science (CS);
dc.subject Memory hierarchy design
dc.subject embedded systems
dc.subject reconfigurable logic
dc.title Memory Hierarchy Hardware-Software Co-design in Embedded Systems
dc.type Article

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