We have fabricated strained Ge channel p-type metal-oxide-semiconductor field-effect transistors (p-MOSFETs) on Siâ .â Geâ .â virtual substrates. The poor interface between silicon dioxide (SiOâ ) and the Ge channel was eliminated by capping the strained Ge layer with a relaxed, epitaxial silicon surface layer grown at 400° C. Ge p-MOSFETs fabricated from this structure show a hole mobility enhancement of nearly 8 times that of co-processed bulk Si devices, and the Ge MOSFETs have a peak effective mobility of 1160 cm²/V-s. These MOSFETs demonstrate the possibility of creating a surface channel enhancement mode MOSFET with buried channel-like transport characteristics.
Singapore-MIT Alliance (SMA)