أعرض تسجيلة المادة بشكل مبسط
| dc.creator |
Río, Rocío del |
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| dc.creator |
Rosa, José M. de la |
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| dc.creator |
Pérez-Verdú, Belén |
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| dc.creator |
Medeiro, Fernando |
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| dc.creator |
Rodríguez-Vázquez, Ángel |
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| dc.date |
2008-04-29T06:35:22Z |
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| dc.date |
2008-04-29T06:35:22Z |
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| dc.date |
1999 |
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| dc.date.accessioned |
2017-01-31T01:05:54Z |
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| dc.date.available |
2017-01-31T01:05:54Z |
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| dc.identifier |
Proceedings of the XIV Design of Circuits and Integrated Systems Conference: 727-732 (1999) |
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| dc.identifier |
http://hdl.handle.net/10261/3852 |
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| dc.identifier.uri |
http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3852 |
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| dc.description |
Comunicación presentada al "XIV Design of Circuits and Integrated Systems Conference" celebrado en Palma de Mallorca (Spain) en Noviembre de 1999. |
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| dc.description |
This paper presents a detailed study on the transient response of SC integrators taking into account the effects of amplifier finite gain-bandwidth product and slew-rate during, unlike previous models, both the integration and sampling phases. Results are applied to the design of high-speed low-power ΣΔ modulators and simplified equations are obtained for manual-estimation of the settling error power. |
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| dc.description |
This work has been partially supported by the ESPRIT Project 29261 and the CICYT Project TIC 97-0580. |
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| dc.description |
Peer reviewed |
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| dc.format |
101890 bytes |
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| dc.format |
application/pdf |
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| dc.language |
eng |
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| dc.rights |
openAccess |
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| dc.subject |
Switched-capacitor circuits |
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| dc.subject |
Σ-Δ modulators |
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| dc.title |
Reliable analysis of settling errors in SC integrators - application to high-speed low-power ΣΔ modulators design |
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| dc.type |
Comunicación de congreso |
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