| dc.creator |
Rosa, José M. de la |
|
| dc.creator |
Pérez-Verdú, Belén |
|
| dc.creator |
Medeiro, Fernando |
|
| dc.creator |
Río, Rocío del |
|
| dc.creator |
Rodríguez-Vázquez, Ángel |
|
| dc.date |
2008-04-28T16:41:11Z |
|
| dc.date |
2008-04-28T16:41:11Z |
|
| dc.date |
2001-08 |
|
| dc.date.accessioned |
2017-01-31T01:05:31Z |
|
| dc.date.available |
2017-01-31T01:05:31Z |
|
| dc.identifier |
J.M. de la Rosa, B. Pérez-Verdú, F. Medeiro, R. del Río and A. Rodríguez-Vázquez, “Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Applications to Bandpass Sigma-Delta Modulators”. Proc. of the 15th European Conference on Circuit Theory and Design, pp. I.309-I.312, Espoo (Finland), August 2001. |
|
| dc.identifier |
http://hdl.handle.net/10261/3838 |
|
| dc.identifier.uri |
http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3838 |
|
| dc.description |
This paper presents a precise model for the transient behaviour of Fully Differential (FD) SwItched-current (SI) memory cells placed at the front-end of high-speed A/D interfaces. This model allows us to analyze the main errors
associated to the S/H process, namely: excess transfer-function delay and harmonic distortion. For the latter, the analysis is extended to BandPass ΣΔ Modulators (BP-ΣΔMs) and a closed-form expression is derived for the third-order intermodulation distortion. Time-domain simulations and experimental measurements taken from a 0.8μm CMOS 4th-order BP-ΣΔM silicon prototype validate our approach. |
|
| dc.description |
Peer reviewed |
|
| dc.format |
185319 bytes |
|
| dc.format |
application/pdf |
|
| dc.language |
eng |
|
| dc.publisher |
Institute of Electrical and Electronics Engineers |
|
| dc.rights |
openAccess |
|
| dc.subject |
Switched-Current Circuits |
|
| dc.subject |
Bandpass Sigma-Delta Modulators |
|
| dc.title |
Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta Modulators |
|
| dc.type |
Artículo |
|