This paper presents an embedded interface, comprising both A/D and D/A converters, which has been implemented in a 0.13μm pure digital CMOS technology. The interface is integrated in a system for high-performance broad-band power-line communications. The A/D converter uses a pipelined structure, whereas the D/A stage is based on segmented current steering techniques. In both cases, specifications are 12-b resolution at 80MS/s and MTPR above 56dB.This work has been partially funded by the European MEDEA+ Office under Project MIDAS-A110.Peer reviewed