A high-performance Sigma-Delta modulator for wireline communication applications is presenfed It employs a 4th-order cascade multi-bit architecfure that requires only 16 oversampling ratio, and has been implemented using fully-differential SC circuits in a 0.25-μm CMOS technology. Measurements show a dynamic range of 84dB operating at 2.2MS/s output rate, and 79dB at 4.4MS/s. The whole prototype dissipates 65.8mW from a 2.5-V supply.This work has been supported by the CEE (ESPRIT IST Project UM1-34283mAMES-2) and the Spanish MCyT and the ERDF (Project TIC2001-0929/ADAVERE).Peer reviewed