| dc.description |
This paper discusses the use of switched-current (SI) circuits to design Band-Pass ΣΔ Modulators (BP-ΣΔMs) suitable for AM digital radio receivers. First of all, the paper briefly outlines the concept and principles of BP-ΣΔMs, and introduces two modulator architectures which are obtained by applying a lowpass-to-bandpass transformation (i.e., z^-1 --> z^-2) to a first-order and a second-order Low-Pass ΣΔ Modulator (LP-ΣΔM), respectively. The resulting BP-ΣΔMs, respectively of second-order and of fourth-order, are then used as case studies for SI circuit implementation. Systematic analysis of the errors associated to SI circuits is carried out and models are presented to evaluate their incidence on the performance of BP-ΣΔMs; the significance of the different errors is illustrated via the two selected case studies. Fully-differential regulated-folded cascode SI memory cells are chosen to attenuate these errors. Based on the proposed error models, optimization is carried out to fulfill AM radio requirements in practical modulator implementations. Two IC prototypes have been fabricated in a CMOS technology, and measured, to validate the presented design methodology. One of these prototypes uses the fourth-order architecture to digitize AM signals, and features resolution with 60mW power consumption from a 5V supply voltage. The other uses the second-order architecture and features with 42mW in the commercial AM band, from 540kHz to 1600kHz. Experimental results show correct noise-shaping for sampling frequencies up to 16MHz, which means a significant operation frequency enhancement as compared to previously reported SI ΣΔ Modulators. |
|