| dc.creator |
Pettenghi, Héctor |
|
| dc.creator |
Avedillo, M. J. |
|
| dc.creator |
Quintana, J. M. |
|
| dc.date |
2008-03-30T18:12:23Z |
|
| dc.date |
2008-03-30T18:12:23Z |
|
| dc.date |
2007-08-14 |
|
| dc.date.accessioned |
2017-01-31T01:01:19Z |
|
| dc.date.available |
2017-01-31T01:01:19Z |
|
| dc.identifier |
European Nano Systems Worshop - ENS 2005, Paris : France (2005) |
|
| dc.identifier |
arXiv:0708.1837 |
|
| dc.identifier |
2-916187-02-2 |
|
| dc.identifier |
http://hdl.handle.net/10261/3365 |
|
| dc.identifier.uri |
http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3365 |
|
| dc.description |
Submitted on behalf of TIMA Editions, http://irevues.inist.fr/tima-editions. |
|
| dc.description |
The basic building blocks for Resonant Tunnelling Diode (RTD) logic circuits are Threshold Gates (TGs) instead of the conventional Boolean gates (AND, OR, NAND, NOR) due to the fact that, when designing with RTDs, threshold gates can be implemented as efficiently as conventional ones, but realize more complex functions. Recently, RTD structures implementing Multi-Threshold Threshold Gates (MTTGs) have been proposed which further increase the functionality of the original TGs while maintaining their operating principle and allowing also the implementation of nanopipelining at the gate level. This paper describes the design of n-bit adders using these MTTGs. A comparison with a design based on TGs is carried out showing advantages in terms of latency, device counts and power consumption. |
|
| dc.description |
This effort was partially supported by the Spanish Government under project TEC2004-02948/MIC. |
|
| dc.description |
Peer reviewed |
|
| dc.format |
585834 bytes |
|
| dc.format |
application/pdf |
|
| dc.language |
eng |
|
| dc.publisher |
Laboratoire TIMA |
|
| dc.rights |
openAccess |
|
| dc.subject |
Resonant Tunneling Diodes |
|
| dc.subject |
MOBILE |
|
| dc.subject |
Multithreshold Threshold gate |
|
| dc.subject |
Nanopipelining |
|
| dc.title |
Using Multi-Threshold Threshold Gates in RTD-based Logic Design. A Case Study |
|
| dc.type |
Comunicación de congreso |
|