| dc.creator |
Huertas-Díaz, J. L. |
|
| dc.creator |
Sánchez-Solano, Santiago |
|
| dc.creator |
Barriga, Angel |
|
| dc.creator |
Baturone, I. |
|
| dc.date |
2008-03-30T17:59:27Z |
|
| dc.date |
2008-03-30T17:59:27Z |
|
| dc.date |
1992-07 |
|
| dc.date.accessioned |
2017-01-31T01:01:19Z |
|
| dc.date.available |
2017-01-31T01:01:19Z |
|
| dc.identifier |
Second International Conference on Fuzzy Logic and Neural Networks (IIZUKA’92), Vol. 1, pp. 535-538, Iizuka, Japan, July 17-22 1992. |
|
| dc.identifier |
http://hdl.handle.net/10261/3364 |
|
| dc.identifier.uri |
http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3364 |
|
| dc.description |
A new architecture is presented for the implementation of fuzzy systems using analog-digital techniques. This architecture
is directed towards allowing the implementation of many rules on the same chip, including the fuzzy inference engine and the defuzzifier. This approach is based on a total or partial sequential
operation of both the fuzzifier and the defuzzifier. A basic operational cell for a membership function circuit as well as its programmable version are described and used for realizing the proposed architecture in a CMOS technology. |
|
| dc.description |
Peer reviewed |
|
| dc.format |
37559 bytes |
|
| dc.format |
application/pdf |
|
| dc.language |
eng |
|
| dc.rights |
openAccess |
|
| dc.subject |
Fuzzy logic |
|
| dc.subject |
Discrete-time techniques |
|
| dc.subject |
Membership function |
|
| dc.subject |
CMOS integrated circuits |
|
| dc.title |
Serial architecture for fuzzy controllers: hardware implementation using analog/digital VLSI techniques |
|
| dc.type |
Comunicación de congreso |
|