dc.creator |
Barriga, Angel |
|
dc.creator |
Sánchez-Solano, Santiago |
|
dc.creator |
Jiménez Fernández, Carlos Jesús |
|
dc.creator |
Galán, D. |
|
dc.creator |
López, D. R. |
|
dc.date |
2007-11-20T12:34:04Z |
|
dc.date |
2007-11-20T12:34:04Z |
|
dc.date |
1996 |
|
dc.date.accessioned |
2017-01-31T00:58:50Z |
|
dc.date.available |
2017-01-31T00:58:50Z |
|
dc.identifier |
Mathware and Soft Computing 1996, 3 (3): 425-434, |
|
dc.identifier |
1134-5632 |
|
dc.identifier |
http://hdl.handle.net/10261/2239 |
|
dc.identifier.uri |
http://dspace.mediu.edu.my:8181/xmlui/handle/10261/2239 |
|
dc.description |
This paper describes a design environment for the hardware realizations of fuzzy controllers which includes a set of CAD tools to ease the description, verification and synthesis of this kind of systems. Special emphasis is focused on the use of a standard hardware description language (VHDL) and compatibility with other integrated circuits design tools. |
|
dc.description |
Peer reviewed |
|
dc.language |
eng |
|
dc.publisher |
Universidad Politécnica de Cataluña |
|
dc.rights |
openAccess |
|
dc.subject |
Soporte físico-hardware |
|
dc.subject |
Sistemas CAD-CAM |
|
dc.subject |
Controladores difusos |
|
dc.subject |
Simulación |
|
dc.subject |
Lenguajes algorítmicos |
|
dc.subject |
Circuito integrado gran escala |
|
dc.subject |
Sistemas de tiempo real |
|
dc.title |
Automatic synthesis of fuzzy logic controllers. |
|
dc.title |
Síntesis automática de controladores lógicos difusos. |
|
dc.type |
Artículo |
|