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http://dspace.mediu.edu.my:8181/xmlui/handle/1721.1/6807| Title: | A Coupled Multi-ALU Processing Node for a Highly Parallel Computer |
| Keywords: | runtime scheduling compile time scheduling parallelscomputers multithreading |
| Issue Date: | 9-Oct-2013 |
| Description: | This report describes Processor Coupling, a mechanism for controlling multiple ALUs on a single integrated circuit to exploit both instruction-level and inter-thread parallelism. A compiler statically schedules individual threads to discover available intra-thread instruction-level parallelism. The runtime scheduling mechanism interleaves threads, exploiting inter-thread parallelism to maintain high ALU utilization. ALUs are assigned to threads on a cycle byscycle basis, and several threads can be active concurrently. Simulation results show that Processor Coupling performs well both on single threaded and multi-threaded applications. The experiments address the effects of memory latencies, function unit latencies, and communication bandwidth between function units. |
| URI: | http://koha.mediu.edu.my:8181/xmlui/handle/1721 |
| Other Identifiers: | AITR-1355 http://hdl.handle.net/1721.1/6807 |
| Appears in Collections: | MIT Items |
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