Please use this identifier to cite or link to this item: http://dspace.mediu.edu.my:8181/xmlui/handle/1721.1/5986
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dc.creatorKnight, Thomas-
dc.creatorWu, Henry M.-
dc.date2004-10-04T14:25:28Z-
dc.date2004-10-04T14:25:28Z-
dc.date1992-03-01-
dc.date.accessioned2013-10-09T02:42:12Z-
dc.date.available2013-10-09T02:42:12Z-
dc.date.issued2013-10-09-
dc.identifierAIM-1282-
dc.identifierhttp://hdl.handle.net/1721.1/5986-
dc.identifier.urihttp://koha.mediu.edu.my:8181/xmlui/handle/1721-
dc.descriptionThe ability to distribute signals everywhere in a circuit with controlled and known delays is essential in large, high-speed digital systems. We present a technique by which a signal driver can adjust the arrival time of the signal at the end of the wire using a pair of matched variable delay lines. We show an implemention of this idea requiring no extra wiring, and how it can be extended to distribute signals skew-free to receivers along the signal run. We demonstrate how this scheme fits into the boundary scan logic of a VLSI chip.-
dc.format13 p.-
dc.format36138 bytes-
dc.format144481 bytes-
dc.formatapplication/octet-stream-
dc.formatapplication/pdf-
dc.languageen_US-
dc.relationAIM-1282-
dc.subjectclock distribution-
dc.subjectsynchronization-
dc.subjectskew compensation-
dc.subjectsphase adjustment-
dc.titleA Method for Skew-free Distribution of Digital Signals Using Matched Variable Delay Lines-
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