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http://dspace.mediu.edu.my:8181/xmlui/handle/1721.1/5598| Title: | Functional Abstraction From Structure in VLSI Simulation Models |
| Keywords: | VLSI circuits simulation functional models temporal reasoning |
| Issue Date: | 9-Oct-2013 |
| Description: | High-level functional (or behavioral) simulation models are difficult, time-consuming, and expensive to develop. We report on a method for automatically generating the program code for a high-level functional simulation model. The high-level model is produced directly from the program code for the circuit components' functional models and a netlist description of their connectivity. A prototype has been implemented in LISP for the SIMMER functional simulator. |
| URI: | http://koha.mediu.edu.my:8181/xmlui/handle/1721 |
| Other Identifiers: | AIM-903 http://hdl.handle.net/1721.1/5598 |
| Appears in Collections: | MIT Items |
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