Please use this identifier to cite or link to this item: http://dspace.mediu.edu.my:8181/xmlui/handle/1721.1/4235
Title: Procedural layout of a high-speed floating-point arithmetic unit
Authors: Armstrong, Robert Clyde.
Keywords: TK7855.M41 R43 no.508
Issue Date: 9-Oct-2013
Publisher: Massachusetts Institute of Technology, Research Laboratory of Electronics
Description: Robert Clyde Armstrong.
Originally presented as author's thesis (Electrical Engineer --Massachusetts Institute of Technology) 1985.
Bibliography: leaf 116.
Supported in part by the U.S. Air Force Office of Scientific Research contract F49620-84-C-0004
URI: http://koha.mediu.edu.my:8181/xmlui/handle/1721
Other Identifiers: no 508
http://hdl.handle.net/1721.1/4235
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