Please use this identifier to cite or link to this item: http://dspace.mediu.edu.my:8181/xmlui/handle/1721.1/3923
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dc.creatorVithayathil, Anne-
dc.creatorHu, Xin-
dc.creatorWhite, Jacob K.-
dc.date2003-12-15T20:45:35Z-
dc.date2003-12-15T20:45:35Z-
dc.date2004-01-
dc.date.accessioned2013-10-09T02:33:13Z-
dc.date.available2013-10-09T02:33:13Z-
dc.date.issued2013-10-09-
dc.identifierhttp://hdl.handle.net/1721.1/3923-
dc.identifier.urihttp://koha.mediu.edu.my:8181/xmlui/handle/1721-
dc.descriptionIn order to assess and optimize layout strategies for minimizing substrate noise, it is necessary to have fast and accurate techniques for computing contact coupling resistances associated with the substrate. In this talk, we describe an extraction method capable of full-chip analysis which combines modest geometric approximations, a novel integral formulation, and an FFT-accelerated preconditioned iterative method.-
dc.descriptionSingapore-MIT Alliance (SMA)-
dc.format10535 bytes-
dc.formatapplication/pdf-
dc.languageen_US-
dc.relationHigh Performance Computation for Engineered Systems (HPCES);-
dc.subjectsubstrate resistance extraction-
dc.subjectmulti-domain surface integral formulation-
dc.subjectsubstrate noise-
dc.subjectcoupling resistances-
dc.titleSubstrate Resistance Extraction Using a Multi-Domain Surface Integral Formulation-
dc.typeArticle-
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