Scheduling of Batch Processors in Semiconductor Manufacturing – A Review

Please use this identifier to cite or link to this item: http://dspace.mediu.edu.my:8181/xmlui/handle/1721.1/3755

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DC Field	Value	Language
dc.creator	Mathirajan, M.	-
dc.creator	Appa Iyer, Sivakumar	-
dc.date	2003-11-29T20:51:29Z	-
dc.date	2003-11-29T20:51:29Z	-
dc.date	2003-01	-
dc.date.accessioned	2013-10-09T02:32:22Z	-
dc.date.available	2013-10-09T02:32:22Z	-
dc.date.issued	2013-10-09	-
dc.identifier	http://hdl.handle.net/1721.1/3755	-
dc.identifier.uri	http://koha.mediu.edu.my:8181/xmlui/handle/1721	-
dc.description	In this paper a review on scheduling of batch processors (SBP) in semiconductor manufacturing (SM) is presented. It classifies SBP in SM into 12 groups. The suggested classification scheme organizes the SBP in SM literature, summarizes the current research results for different problem types. The classification results are presented based on various distributions and various methodologies applied for SBP in SM are briefly highlighted. A comprehensive list of references is presented. It is hoped that, this review will provide a source for other researchers/readers interested in SBP in SM research and help simulate further interest.	-
dc.description	Singapore-MIT Alliance (SMA)	-
dc.format	362263 bytes	-
dc.format	application/pdf	-
dc.language	en_US	-
dc.relation	Innovation in Manufacturing Systems and Technology (IMST);	-
dc.subject	scheduling	-
dc.subject	batch processor	-
dc.subject	semiconductor manufacturing system	-
dc.subject	review	-
dc.subject	classification	-
dc.title	Scheduling of Batch Processors in Semiconductor Manufacturing – A Review	-
dc.type	Article	-
Appears in Collections:	MIT Items

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