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http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3769| Title: | Interactive verification of switched-current ΣΔ modulators |
| Keywords: | Switched-Current Circuits Modeling and Simulation Sigma-Delta Modulators |
| Publisher: | Institute of Electrical and Electronics Engineers |
| Description: | Comunicación presentada al "ICECS'98" celebrado en Lisboa del 7 al 10 de septiembre de 1998. A simulation tool named SDSI, specifically suited for the simulation of switched-current (SI) sigma-delta data converters, has been developed in an interactive design environment. The tool exploits the sampled-data nature of the circuits and provides several levels of hierarchy for the models. High level behavioural models are suited for initial system-level simulations and specification of building blocks. Lower level models, which take into account non-linear effects and eventually full SPICE level transistor models, are suited for bottom-up verification of circuits after the design of the building-blocks. There are no restrictions on the interoperability of both types of models. Very fast simulation times are achieved thanks to the sampled-data simulation approach, making the tool appropriate for the extensive analysis of sigma-delta modulators. The tool has been used to check the performance of a SI bandpass sigma-delta modulator fabricated in a 0.8μm CMOS technology. Experimental results validate this approach to the verification of SI ΣΔ modulators. This work has been partially supported by the Spanish CICYT Project TIC 97-0580. Peer reviewed |
| URI: | http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3769 |
| Other Identifiers: | IEEE International Conference on Electronics, Circuits and Systems 2: 157-160 (1998) 0-7803-5008-1 http://hdl.handle.net/10261/3769 10.1109/ICECS.1998.814854 |
| Appears in Collections: | Digital Csic |
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