Please use this identifier to cite or link to this item: http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3729
Title: Fourth-order cascade SC ΣΔ modulators: a comparative study
Keywords: Analog-digital conversion
ΣΔ modulators
Switched-capacitor circuits
Publisher: Institute of Electrical and Electronics Engineers
Description: Fourth-order cascade ΣΔ modulators are very well suited for IC implementation using analog sampled-data circuits because of their robust, stable operation and their capability to achieve high resolution and wide bandwidth with moderate power consumption. However, their optimum realization requires careful consideration of their performance degradations due to the hardware nonidealities. This paper presents a comparative study of the influence of finite op-amp gain and capacitor mismatch on the performance of fourth-order cascade ΣΔ modulators realized by means of switched-capacitor circuits. It considers single-bit and multibit quantizers and draws a number of comparative remarks validated by time-domain behavioral simulations.
This work was supported in part by the CEE ESPRIT Program under Project #8795 (AMFIS).
Peer reviewed
URI: http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3729
Other Identifiers: IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications: 1041-1051 (1998)
1057-7122
http://hdl.handle.net/10261/3729
10.1109/81.728858
Appears in Collections:Digital Csic

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