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http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3598| Title: | High-Order Cascade Multi-bit ΣΔ Modulators for High-Speed A/D Conversion |
| Keywords: | ΣΔ Modulator A/D Conversion Communication Frequency Range |
| Publisher: | Universidad Carlos III de Madrid |
| Description: | The use of Sigma-Delta (ΣΔ) modulation for analog-to-digital conversion (ADC) in the
communication frequency range is evaluated. Two high-order multi-bit architectures are proposed to achieve +12-bit dynamic range at 4Msample/s Nyquist rate using very low oversampling ratio. They show very low sensitivity to the internal D-to-A conversion (DAC) error with no calibration required. Simulations show that such performance can be achieved even in presence of circuit imperfections. This work has been partially supported by the Spanish CICYT Project TIC 97-0580. Peer reviewed |
| URI: | http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3598 |
| Other Identifiers: | Proc. Design of Circuits and Integrated Systems Conf. (DCIS’98), pp. 76-81, Madrid, November 1998. http://hdl.handle.net/10261/3598 |
| Appears in Collections: | Digital Csic |
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