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http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3574Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.creator | Rosa, José M. de la | - |
| dc.creator | Pérez-Verdú, Belén | - |
| dc.creator | Río, Rocío del | - |
| dc.creator | Rodríguez-Vázquez, Ángel | - |
| dc.date | 2008-04-14T17:27:46Z | - |
| dc.date | 2008-04-14T17:27:46Z | - |
| dc.date | 2000-08-01 | - |
| dc.date.accessioned | 2017-01-31T01:02:18Z | - |
| dc.date.available | 2017-01-31T01:02:18Z | - |
| dc.identifier | IEEE Journal of Solid-State Circuits 35(8): 1220-1226 (2000) | - |
| dc.identifier | 0018-9200 | - |
| dc.identifier | http://hdl.handle.net/10261/3574 | - |
| dc.identifier | 10.1109/4.859514 | - |
| dc.identifier.uri | http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3574 | - |
| dc.description | This paper presents a CMOS 0.8-/spl mu/m switched-current (SI) fourth-order bandpass /spl Sigma//spl Delta/ modulator (BP-/spl Sigma//spl Delta/M) IC capable of handling signals up to 1.63 MHz with 105-bit resolution and 60-mW power consumption from a 5-V supply voltage. This modulator Is intended for direct A/D conversion of narrow-band signals within the commercial AM band, from 530 kHz to 1.6 MHz. Its architecture is obtained by applying a low-pass-to-bandpass transformation (z/sup -1//spl rarr/-z/sup -2/) to a 1-bit second-order low-pass /spl Sigma//spl Delta/ modulator (LP-/spl Sigma//spl Delta/M). The design of basic building blocks is based upon a detailed analysis of the influence of SI errors on the modulator performance, followed by design optimization. Memory-cell errors have been identified as the dominant ones. In order to attenuate these errors, fully differential regulated-folded cascode memory cells are employed. Measurements show a best SNR peak of 65 dB for signals of 10-kHz bandwidth and an intermediate frequency (IF) of 1.63 MHz. A correct noise-shaping filtering is achieved with a sampling frequency of up to 16 MHz. | - |
| dc.description | This work has been supported by the Spanish CICYT Project TIC 97-0580. | - |
| dc.format | 956485 bytes | - |
| dc.format | application/pdf | - |
| dc.language | eng | - |
| dc.publisher | Institute of Electrical and Electronics Engineers | - |
| dc.relation | http://dx.doi.org/10.1109/4.859514 | - |
| dc.rights | openAccess | - |
| dc.subject | Analog-to-digital conversion | - |
| dc.subject | ΣΔ modulation | - |
| dc.subject | Switched-currentΔΣ | - |
| dc.title | A CMOS 0.8- µm transistor-only 1.63-MHz switched-current bandpass ΣΔ modulator for AM signal A/D conversion | - |
| dc.type | Artículo | - |
| Appears in Collections: | Digital Csic | |
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