Please use this identifier to cite or link to this item: http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3530
Title: CMOS design of a current-mode multiplier/divider circuit with applications to fuzzy controllers
Keywords: CMOS multiplier/divider circuits
Current-mode signal processing
Continuous-time data converters
Fuzzy logic hardware
Publisher: Springer
Description: El pdf del artículo es la versión de autor.
Multiplier and divider circuits are usually required in the fields of analog signal processing and parallel-computing neural or fuzzy systems. In particular, this paper focuses on the hardware implementation of fuzzy controllers, where the divider circuit is usually the bottleneck. Multiplier/divider circuits can be implemented with a combination of A/D-D/A converters. An efficient design based on current-mode data converters is presented herein. Continuous-time algorithmic converters are chosen to reduce the control circuitry and to obtain a modular design based on a cascade of bit cells. Several circuit structures to implement these cells are presented and discussed. The one that is selected enables a better trade-off speed/power than others previously reported in the literature while maintaining a low area occupation. The resulting multiplier/divider circuit offers a low voltage operation, provides the division result in both analog and digital formats, and it is suitable for applications of low or middle resolution (up to 9 bits) like applications to fuzzy controllers. The analysis is illustrated with Hspice simulations and experimental results from a CMOS multiplier/divider prototype with 5-bit resolution. Experimental results from a CMOS current-mode fuzzy controller chip that contains the proposed design are also included.
We gratefully acknowledge support from C.S.I.C (Consejo Superior de Investigaciones Científicas) under a postdoctoral grant of the first author.
Peer reviewed
URI: http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3530
Other Identifiers: Analog Integrated Circuits and Signal Processing 23(3): 199-210 (2000)
0925-1030 (Print)
1573-1979 (Online)
http://hdl.handle.net/10261/3530
10.1023/A:1008367503866
Appears in Collections:Digital Csic

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